How to extract background carrier density, built-in potential, barrier height, and ideality factor of a Schottky diode?

Schottky diode
Schottky diode is a metal/semiconductor diode (figure 1). Figure 1 shows a vertical structure of a  Schottky diode and relevant contact. The Schottky contact is the higher potential and Ohmic contact is the lower potential. It works at low forward voltage. Sometimes it is called a hot-carrier diode. This is typically used for fast switching purposes. 

Vertical SBD device structure

Figure 1: Vertical SBD device structure

Considering depletion layer spacing of W and permittivity, the Schottky junction works as a capacitor. The relation among the capacitor parameters is shown in equations (I) and (II) (figure 2) where Vbi is built-in potential, A is the area of the Schottky contact, ND is donor concentration, and V is the applied voltage, q is the electron charge.

Mathematical relation of C and V.
Figure 2: Mathematical relation of C and V.  

By performing C-V measurement (figure 3) and corresponding plotting of 1/(C*C)-V plot, it becomes a linear function of the applied voltage V, equating the slope (equation (II)) with the extracted slope from the 1/C*C-V and using the area A of Schottky contact, charge q, and permittivity constant of the material gives the doping concentration. Also, the extrapolation of the 1/C*C-V to the v axis gives the built-in potential of the diode (see fig. cut the v-axis).
Built-in potential extraction from C-V data.
Figure 3: Built-in potential extraction from C-V data.


Barrier height

It is just a potential difference between the metal Fermi energy and the band edge (after contact with the semiconductor ) to the majority carrier belongs. Figure 4 shows the nature of Schottky contact nature when metal and semiconductor (n-type) contact take place. With forwarding bias, the barrier height reduces, and reverse biased increases the height which is a basic part of p-n junction understanding and they can be found in a solid-state device physics book.
Conceptual Schottky contact.
Figure 4: Conceptual Schottky contact.

However, to extract, barrier height, we require temperature-dependent I-V but alternatively, we can roughly extract the barrier using the following relation as shown in figure 5:

Barrier height extraction method.

Figure 5: Barrier height extraction method.



Ideality factor

The ideality factor defines the properness of the diode. Usually, temperature-dependent I-V measurement is carried out to find out the diode ideality factor because it strongly depends on the temperature and applied voltage. But we can roughly estimate the ideality factor n-from the slope of the small-signal I-V plot. Figure 6 explains the detail of the extraction of n.
Diode ideality factor extraction method.
Figure 6: Diode ideality factor extraction method.

Ideality factor 1.0 means recombination is limited with the help of a minority carrier (band to band or low-level carrier injection takes place). If it is 2.0 then the recombination is controlled by the majority and minority carriers (large injection). If recombination takes place via an isolated point defect, then the ideality factor is 2 or less as predicted by Shockley-Read-Hall recombination assumptions. Further, if it is over 2.0 then a multiple recombination process is involved including majority and minority carriers (Auger or two carrier type controls the recombination process). Usually, the too low field inside the depletion region pushes single-level tunneling by the trap. For two-level recombination, one shallow level is considered and that indicates high defects volume results in a large ideality factor. If we consider that the current is not flowing homogeneously in the diode, then we can consider why the large ideality factor happens even in the low voltage range. We know from some literature the main source of current at high ideality factor due to edge defect when the carrier crosses junction. It is necessary to understand the origin of edge opening during device processing (etching, dicing, or generating amorphous surface during device processing to avoid extending defect density). Also, there are other factors like large series and shunt resistance that causes large ideality factor even at low voltage. You can also learn Magnetic second-order transition.

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